Static and Dynamic Power Dissipation in digital system | applied electronics engineering


Static and Dynamic Power Dissipation in digital system

By Applied Electronics - Monday, August 29, 2016 No Comments
Static and Dynamic power dissipation are two types of power dissipation that exist in digital system. Power is a very important in electronics as it relates to heat generation and malfunction of the device. One wants to diminish power or heat generation as much as possible. As the requirement increased and technology allowed to pack more and more integrated circuits into a single chip, so has the problem of power dissipation. Sedra Smith 6th edition gives a good description on this topic.

One way to cope with the power dissipation in digital system or IC design is to take into account the power dissipated by single gate. Consider the following inverter figure.

If the inverter or the switch is open and the input voltage vI is low then there is no power dissipation. If the inverter switch is closed then we have power dissipation given by the following equation:

This power dissipation exist even when there is no switching. This power dissipation is called Static Power Dissipation.

Next consider the CMOS inverter/switch circuit shown below.

In this case, there is no power dissipation during the switching operation from the transistor themself. But now there is power dissipation due to the capacitance that exist virtually between the output node and the ground. Now whenever switching is performed this capacitance gets charged and discharged producing heat. This type of power dissipation is called dynamic power dissipation.

The formula for dynamic power dissipation is as follows:

Here, C is the capacitance build between the output and the ground. f is the switching frequency and VDD is the power supply voltage.

To see how this equation is derived see sedra smith 6th edition pdf.


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