Block Diagram of QPSK modulator demodulator | applied electronics engineering


Block Diagram of QPSK modulator demodulator

By Applied Electronics - Wednesday, September 14, 2016 No Comments
QPSK(Quadrature Phase Shift Keying) is a digital modulation demodulation technique. In this, at the transmitter, the stream of digital bits are demultiplexed and fed to two arms of the QPSK modulator. At each arm, the bits are mixed with carrier signals which differs by 90 degree phase. Then the outputs from each of the mixer combined to form a signal Smod(t) which is called QPSK signal. This QPSK signal Smod(t) is then amplified and sent to the antenna for wireless transmission case.

Following figure shows the block diagram of QPSK modulator

At the receiver, the Smod(t) QPSK signal is detected by the antenna, then bandpassed filtered and down-coverted from high frequency to intermediate frequency. Then the IF signal may again be bandpass filtered to remove any harmonics. These stages are not shown here. See How wireless transmitter and receiver works?

After these stages of signal processing the QPSK signal is finally demodulated(recovering the embedded information signal). The block diagram of QPSK demodulator is shown below.

The QPSK signal Smod(t) is passed to both arms of the demodulator. At each arm the signal gets mixed with locally generated carrier signal which are 90 degree phase shifted apart. Then the signals from the mixers gets integrated over a period. This generates amplitude samples. But these amplitude bits are not yet quantized. These samples are then passed into threshold detectors. There the samples are quantized to either 1 or 0. Thus after the threshold we get digital bits. These digital bits are then multiplexed in order to generate baseband signal SBB(t).

The mixing of digital signal with the analog carrier signal follows the following rule:

The baseband signal SBB(t) at the transmitter is essentially a ON-OFF signal, that is, 0 or 1 streams. However for the purpose of transmitting the signal over the air and for protection against errors, these ON-OFF signal is coverted to Biploar signal -1 and 1. So a 0 is converted to -1V and 1V is left alone. These signals are then mixed with the locally generated carrier signal according to the dibits. So if we have 000101101 data stream, 1 enters the upper arm and 0 to the lower arm by the demultiplexer. This corresponds to 10 dibits. 1 is converted to +1V and 0 to -1V as explained above. You can see from the table above, dibit 10 corresponds to 7/4 = 315 degree. So, cosine signal at this phase 315 degree is generated by local oscillator which is mixed with the 1V. Similarly, sine signal at 315 phase via 90 degree phase signal is mixed with -1V at the lower arm. The outputs from these arms are then summed to get the final QPSK signal Smod(t).

In mathematical term, this QPSK signal is as follows:

where φ is the angle such as 315 degree.

 See more of QPSK modulation:


No Comment to " Block Diagram of QPSK modulator demodulator "