If you are electronics or computer students and on the top of that engineering student, you need to learn many ways of designing circuits. One of them is FPGA technology and the various FPGA languages such as VHDL, Verilog, SystemC and FPGA devices or FPGA chips. The VHDL language is a popular one for programming FPGA devices.

Here are some tips and hints you could use in order to accelerate your VHDL language learning curve. There are two ingradient to learning VHDL programming. First is knowing what you are doing and second is the VHDL language itself.

Knowing what you are doing is the first step because unless you don't know what are you doing what is the language useful of? So we start off with the basic objective of learning VHDL. For readers who don't want to get to know the purpose of learning VHDL can skip the next few paragraph and go directly to the how to learn VHDL language section down below.

Basically, VHDL language is used for designing or implementing Digital hardware. Now an FPGA chip is like a matrix interconnected by burnable fuses. By suitable burning of the fuses you implement connection paths which forms the digital logic of your hardware- for example AND gate, adder, microprocessor, microcontrollers, image processsing hardware etc.

So before you start, you must have theoretical knowledge of how digital system works and how they are constructed and the basic logic gates, SSI, MSI and perhaps LSI components behind the digital system used to construct them.

As you know any digital systems are constructed from basic logic gates- AND, OR, XOR, NOT, NAND, NOR and so on. These in turn are used to construct higher level devices such as decoder, encoders, multiplexer, demultiplexers, flip flops, shift registers and so on.

That means, you should start learning VHDL language by knowing how the basic logic gates are implemented using the VHDL language. That means, start by writing AND, OR, NOT, XOR then NAND, NOR,XOR etc.

After then you should learn how to write the higher level components- multiplexers, decoders, flip flops, registers, full adders and subtractors and so on.

At this point as you learn VHDL language, you will come to know that there are different ways to do the same thing. For example, a multiplexer can be implemented structurally and behaviorally and again within the behavior language writing there are four other ways. So this might be one point where VHDL language can be difficult at first.

In brief, in structural technique you implement, for example, a multiplexer using the basic logic gates as you would have learnt in your digital system design engineering classes. In contrast, in behavioral technique you implement the multiplexer by just writing what the multiplexer(or any devices) is supposed to do- output the input when the control is 1 and don't output the input when the control is 0. Then you will realize that there are four behavioral language construct or keywords that allows do the same thing. For our multiplexer example see the following code even if you don't understand at this point.

library ieee;
use ieee.std_logic_1164.all;

entity multiplexer is
    a, b : in std_logic;
    sel : in std_logic;
    f : out std_logic
end multiplexer;

architecture model1 of multiplexer is
     f <= a when sel = '1' else b;
end model1;

architecture model2 of multiplexer is
    with sel select f <=
    a when '1',
    b when others;
end model2;

architecture model3 of multiplexer is
        if sel = '1' then
            f <= a;
            f <= b;
        end if;
    end process;   
end model3;

architecture model4 of multiplexer is
        case sel is
            when '1' => f <= a;
            when others => f <= b;
        end case;
    end process;
end model4;

You should notice that there are four architectures with four architecture names- model1, model2, model3 and model4. Each is different ways of writing multiplexer VHDL code behaviorally. For more details on the above code see four ways to write multiplexer in VHDL.

This process of building higher level hardware from smaller units like gates or directly implementing algorithms is the essence of VHDL language. Thus, from gates to multiplexers etc and from multiplexers level designs to higher level hardware for example a microprocessor itself.

Now having known now the why VHDL language is used it is time to know the VHDL language itself. Note that this is a guide to learning and not teach the VHDL language. VHDL language is huge and requires more space than this. You should be able to complete VHDL language in 4 to 6 months or at max a year if you are serious about this.

Now how to learn VHDL language?

There are two things to keep in mind if you want to learn VHDL language quickly. First off- VHDL language is like learning any other language and similar in construct like C programming language, python, web programming languages such as java, javascript etc. Second there are also some difference between VHDL language and other programming language by not the language construct itself but in other ways as you will see down below.

Let us first see briefly about the similarity between VHDL language and other  programming language. The point here is let you know that the VHDL language construct is very similar to other programming language.

Any coding language has "keywords"- the preserved words in the language which you have to learn by hard and cannot use for your own purpose. Examples of keywords in C(if you are familiar and most of you should) are keyword like int, char, or mathematical keywords like + or / and statement keywords like if or while. Similarly in VHDL language you have keywords that you can use.

You also have kind of preprocessor directive like #include in C, libraries where you can pick up afore-designed components into your current working design.

Like other programming language you have data types, mathematical operators and rules associated with them, and you have the conditional statements and loop statements.

So you should start VHDL language by looking at how various data types(boolean, integers, strings etc), arrays, mathematical operators and the behavioral statements are used in VHDL and what they are.

The point here is that by knowing first that the VHDL language(like any other programming language) are grouped in various functions(like representing variables, doing mathematical operation and for conditional and loop statements) in form of keywords you will benefit learning language.  

The next point is about how VHDL language differs from other programming language. Herein first note that VHDL language are for constructing hardware. Digital hardware or any electronics runs in parallel. At any given time, signal in the hardware can come simultaneously from different parts of system. Thus signal propagate in the system in parallel. In contrast other programming languages like C are designed to run step by step, algorithmically or rather sequentially. Thus VHDL language are such that the code runs in parallel as opposed to sequentially as in other languages. As a tip while writing VHDL code, you should always remember that what you are writing will be operated in parallel and not sequentially.

Now that you know how VHDL language is basically constructed and how it mainly differs from other programming languages, we will next hint out other aspect of VHDL language.

Any system level or sub-system level components, any components, in VHDL language has a three parts to it-

1. Directives/ Libraries/ Packages/ Definitions
2. A Head
3. A Body

The Directives/ Libraries/ Packages/ Definitions is at the top which tells the FPGA synthesizer of the FPGA software tells that you are using this version of VHDL language, this package or libraries will be used and where to find them. Same as in other programming languages such as the #include in C for example.

The Head contains the input and output port, the number of signal inputs. Basically it is the interface of the hardware. For example- a two input AND gate has two inputs and one output. This part of the devices goes into the head section. The VHDL keyword Entity is used here and you can use any variable name for the head/entity like and_gate for example.

The body section is what tells what the hardware is supposed to do. For AND gate example this would be if one input is 0 and the other input 1 then the output is 0. The body section begins with reserved keyword architecture and you can give it a variable name of you liking. You could have multiple architecture for the same hardware but not multiple head.

Then you would use the VHDL programming language you learnt in the above three sections. The directive and head section are usually the same and not difficult to learn. The VHDL programming language is mostly used in the body section.

Finally, you should learn the practical side of learning VHDL language. You should know your FPGA device or the FPGA chip. This require experience with the hardware itself and also on the FPGA software.

Lastly below are some useful links in regards to learning VHDL.

1. How to start a new project in Vivado FPGA software?
You need FPGA software to learn VHDL coding. This is a tutorial to help you with getting started Vivado from Xilinx Inc. The following picture shows how D flip flop VHDL code looks like in Vivado software.

2. Some books on learning FPGA
You would need FPGA books also. For this following are recommended-

a. Digital Design by Morris Mano and Michael D. Ciletti, 4rd Edition
This one is popular and used as textbook for digital design. The book contains basics, combinational and sequential circuits, logic optimization(very helpful here), finite state machine and FSM with datapath. Overall it is good and is complete book for digital design. Perhaps hardware and digital component picture would help the students better in what they are doing in the topics it explains.

b. Digital System Design with VHDL
There are so many good out there on VHDL so it hard to recommend. Search this blog for other books. But anyway, this book is good with getting started with VHDL. It is clearly written and with illustrative pictures.

c. Fundamentals of Digital logic with VHDL Design
Another good book for beginners with good introduction to VHDL.

d. VHDL Coding Styles and Methodology
If you want to dwell more into VHDL language itself then this book is perhaps good.


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