This is a quick video tutorial on how to use Modelsim for logic gate design and verification. An AND gate is constructed with verilog HDL and a testbench is also created to test it's logic.

The first step is to create a new project in Modelsim. Then an AND gate and its testbench are created. Finally operation of the gate is checked through simulation.

Watch the video below-



To those beginners in digital electronics, the book Digital Electronics, Volume 1 Combinational Logic Circuits pdf download free is recommended for logic gates. For FPGA programming the book FPGAs for Dummies for beginners.

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